Hello! My name is Hyunwon Chung, and I am a PhD student at the University of Michigan. I am supervised by Professors David Blaauw and Hun-Seok Kim.
My research interests span reconfigurable and dataflow architecture for wireless communication and machine learning. I have taped out multiple chips across GF 12nm and TSMC 28nm processes — including heterogeneous SoCs for beyond-5G optical communication and streaming processors for advanced spectrum sensing.
More recently, my work has focused on efficient hardware for large language models. I design hardware architectures tailored for approximation techniques in billion-parameter LLMs, develop performance and energy models to analyze the hardware impact of approximation algorithms, and perform architecture-level design space exploration to identify efficient accelerator configurations for approximated LLM workloads.
news
| Mar 2026 | Paper accepted to IEEE Symposium on VLSI Circuits 2026! |
|---|---|
| Sep 2025 | Finished another tapeout using TSMC 28nm ! |
| Aug 2024 | Started PhD at the University of Michigan-Ann Arbor ! |
| Nov 2023 | Finished my first tapeout using GF 12nm ! |
| Aug 2022 | Started master’s at the University of Michigan-Ann Arbor ! |